MARC details
| 000 -LEADER |
|---|
| fixed length control field |
03465nam a22003617a 4500 |
| 003 - CONTROL NUMBER IDENTIFIER |
|---|
| control field |
BD-DhULA |
| 005 - DATE AND TIME OF LATEST TRANSACTION |
|---|
| control field |
20250211121203.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION |
|---|
| fixed length control field |
190924b ii ||||| |||| 00| 0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
9780070667242 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER |
|---|
| International Standard Book Number |
0070667241 |
| 040 ## - CATALOGING SOURCE |
|---|
| Original cataloging agency |
BD-DhULA |
| Transcribing agency |
BD-DhULA |
| 041 ## - LANGUAGE CODE |
|---|
| Language code of text/sound track or separate title |
English |
| 082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER |
|---|
| Edition number |
22 |
| Classification number |
621.395 |
| Item number |
BRF |
| 100 1# - MAIN ENTRY--PERSONAL NAME |
|---|
| 9 (RLIN) |
2155 |
| Personal name |
Brown, Stephen. |
| 245 10 - TITLE STATEMENT |
|---|
| Title |
Fundamentals of digital logic with verilog design / |
| Statement of responsibility, etc. |
by Stephen Brown, Zvonko Vranesic. |
| 250 ## - EDITION STATEMENT |
|---|
| Edition statement |
2nd ed. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. |
|---|
| Place of publication, distribution, etc. |
New Delhi, India : |
| Name of publisher, distributor, etc. |
McGraw Hill Education, |
| Date of publication, distribution, etc. |
c2008 [2014]. |
| 300 ## - PHYSICAL DESCRIPTION |
|---|
| Extent |
xviii, 865 p. : |
| Dimensions |
24 cm. |
| Accompanying material |
Includes 1 DVD-ROM |
| Other physical details |
ill. ; |
| 500 ## - GENERAL NOTE |
|---|
| General note |
Includes index. |
| 505 ## - FORMATTED CONTENTS NOTE |
|---|
| Formatted contents note |
CONTENTS<br/>Chapter 1<br/>Design Concepts <br/>Chapter 2<br/>Introduction to Logic Circuits<br/>Chapter 3<br/>Implementation Technology<br/>Chapter 4<br/>Optimized Implementation of Logic Functions<br/>Chapter 5<br/>Number Representation and Arithmetic Circuits<br/>Chapter 6<br/>Combinational-Circuit Building Blocks<br/>Chapter 7<br/>Flip-Flops, Registers, Counters, and a Simple Processor<br/>Chapter 8<br/>Synchronous Sequential Circuits<br/>Chapter 9<br/>Asynchronous Sequential Circuits<br/>Chapter 10<br/>Digital System Design<br/>Chapter 11<br/>Testing of Logic Circuits<br/>Chapter 11<br/>Computer Aided Design Tools<br/> |
| 520 ## - SUMMARY, ETC. |
|---|
| Summary, etc. |
Mainly designed for undergraduate students of Digital Principles and Logic Design, Fundamentals of Digital Logic with Verilog Design strikes a perfect balance between explaining the concepts and illustrating their practical application through CAD tools.<br/><br/>A proper understanding of logic circuits, that is, circuits from which computers are built, is vital for today’s computer and electrical engineers. In this book, the authors have given detailed theoretical explanations and have also included several examples to further enhance the students’ understanding of simple circuit design, using the classic manual method and modern day methods, using CAD tools.<br/><br/>There is an emphasis on Programmable Logic Devices, using the most appropriate modern technology, FPGA and CPLD. The use of the IEEE standard Verilog HDL language has also been discussed. The software, Altera Quartus II, is included in this text. This software provides automatic mapping of a design into Altera CPLDs and FPGAs. The book also provides numerous examples of design that can help complement a course. The authors have included 173 solved examples, 687 illustrations and 356 problems.<br/><br/>There are 12 chapters in the book. These are Design Concepts, Introduction to Logic Circuits, Optimized Implementation of Logic Functions, Implementation Technology, Combinational-Circuit Building Blocks, Number Representation and Arithmetic Circuits, Synchronous Sequential Circuits, Asynchronous Sequential Circuits, Flip-Flops, Registers, Counters and a Simple Processor, Testing of Logic Circuits, Digital System Design, and Computer Aided Design Tools. Appendix A is Verilog Reference and Appendix B is Commercial Devices.<br/>Each chapter begins with a section titled Chapter Objectives, which gives an overview of what the chapter deals with. |
| 526 0# - STUDY PROGRAM INFORMATION NOTE |
|---|
| Program name |
EEE |
| 590 ## - LOCAL NOTE (RLIN) |
|---|
| Local note |
424015. |
| 650 04 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| 9 (RLIN) |
2157 |
| Topical term or geographic name entry element |
Logic Circits |
| 650 04 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Logic Design |
| 9 (RLIN) |
2237 |
| 650 04 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| 9 (RLIN) |
2158 |
| Topical term or geographic name entry element |
Verilog Design |
| 650 04 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Integrated Circuits |
| 9 (RLIN) |
2238 |
| General subdivision |
Design and Construction |
| 650 04 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Digital Electronics |
| 9 (RLIN) |
292 |
| 650 04 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
EEE |
| 9 (RLIN) |
254 |
| 650 04 - SUBJECT ADDED ENTRY--TOPICAL TERM |
|---|
| Topical term or geographic name entry element |
Electrical and Electronic Engineering |
| 9 (RLIN) |
255 |
| 700 1# - ADDED ENTRY--PERSONAL NAME |
|---|
| 9 (RLIN) |
2156 |
| Personal name |
Vranesic, Zvonko. |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) |
|---|
| Source of classification or shelving scheme |
Dewey Decimal Classification |
| Koha item type |
BOOK |